The PCIe 20 output clock buffer is the ideal solution for servers, data centers, new generation storage devices and other PCIe applications.
Microchip Technology Inc. has officially launched 4 new 20-output differential clock buffer lines for next-generation data center applications that exceed PCIe Gen 5. oscillator frequency standards. Two lines ZL40292 (endpoint) 85Ω) and ZL40293 (100Ω endpoint) are specifically designed to meet DB2000Q specification, while ZL40294 (end point 85Ω) and ZL40295 (100Ω endpoint) meet DB2000QL industry standards.
It is known that all 4 buffers are suitable solutions for servers, data centers, new generation storage devices and other PCIe applications. These new devices also meet PCIe Gen 1, 2, 3 and 4 specifications.
The new buffer line has low power attenuation, which contributes to significant power savings through the use of standard Low-Power High-Speed Current Steering Logic (High-power, high-speed logic logic, LP-HCSL). Compared to the HCSL standard, LP-HCSL consumes only a third of the electricity, significantly reducing electricity consumption.
This feature also enables customers to design longer circuits on the board, improve signal routing, and reduce space for components and boards. For example, ZL40292 can exclude up to 80 terminal resistors (4 resistors / outputs) compared to traditional HCSL buffers.
ZL40292 and ZL40293 now allow trial and order quantities of QFN 10 x 10 mm, 72 pins. ZL40294 and ZL40295 now allow trial use of QFN 6 x 6, 80 foot packages. For more information on prices, contact Microchip's authorized dealer, global distribution company or visit Microchip's website.